1. Field of the Invention
The present invention relates to an interposer and a method of manufacturing an interposer.
2. Discussion of the Background
A substrate referred to as an interposer is used as an intermediate substrate onto which a semiconductor element such as a logic and memory is loaded.
Japanese Laid-Open Patent Publication No. 2006-19368 describes an interposer in which there is formed an inorganic insulating layer comprising SiO2 on an Si surface and there is formed a pattern by copper plating on the surface of the inorganic insulating layer, and a semiconductor device onto which a semiconductor element is loaded.
Japanese Laid-Open Patent Publication No. 2006-294692 describes an interposer having wiring layers and a semiconductor device onto which a semiconductor element is loaded, and for each of the wiring layers of the interposer, a resin such as a polyimide resin is used for an insulating layer and the wiring is formed with a plating method.
The contents of these publications are incorporated herein by reference in their entirety.